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Improving the reliability of chip on board assembly

Epoxy encapsulated Chip on Board (COB) electronic circuits has been in common use for decades. ERA has recently investigated a range of COB circuit designs being built off-shore where reliability problems were increasingly being experienced.

Epoxy COB electronic circuits has been in common use for decades. Most of us wear one on our wrist to tell the time! Some companies employ COB very successfully, others are not as successful as they would like us to believe, or suddenly run into problems on long running stable designs. Some companies never get it right.

ERA has recently investigated a range of COB circuit designs being built off-shore where reliability problems were increasingly being experiencing. The client wisely admitted that he didn’t know much about the technology and enlisted ERA’s expertise.

ERA’s initial brief was simply to de-capsulate and investigate failed units. As anticipated, reverse-engineering did not yield any valuable information so a more structured approach comprising four steps was undertaken:

1. Training the client in the technologies being used, the pitfalls and appropriate testing.
2. Examination of the quality of build of unencapsulated units
3. Analysis of past failure trends
4. Remedial actions.

Training
The first task was to provide the client with a tutorial on the key assembly techniques; chip bonding, wire bonding and encapsulation, and the attendant pitfalls (e.g. bonding parameters, wire fatigue, shrink on cure, differential thermal expansion, etc.). The second was to explain how to plan and conduct meaningful accelerated life testing using fast thermal cycling. The selection of the temperature limits and cycle time is crucial, as is how to determine whether the failures are random or systematic.

Examination of build quality

Figure 1. Variant 1 - the earliest design. No circuitry between the bond pads

Figure 2. Variant 2. Some protective circuitry between the pads

Figure 1. A wire bonded chip before and after encapsulation

Wire bonded but unencapsulated units were examined by scanning electron microscopy (SEM). This technique not only provides imaging over a vast range of magnifications but combines this with much greater depth of field than optical microscopy. Both of these characteristics are extremely helpful in examining small and large scale features on three dimensional structures.

Most of what was seen was as expected but two notable features were revealed:

  • When bonding with aluminium wire the first bond will almost always show some degree of brittle fracture at the ‘heel’, immediately beside the bond area. This occurs when the wire is shaped during the loop formation, and the bend at the work hardened edge of the bond cracks to some degree. Cracking at the heel of the first bond was severe.

Figure 4. Variant 4. Redesign into square form factor

Figure 2. A first wire bond with heel cracking

  • The direction of bonding was inconsistent. Some of the bonds were ‘forward bonded’ - i.e. the first bond was on the chip with the second bond on the pcb, but some were ‘reverse bonded’ - i.e. the first bond was on the pcb, with the second bond on the chip. This is an unusual practice.

Analysis of past failures
The client had never analysed failures to look for any trends. ERA categorised the types of circuit faults found. A few random fault modes – e.g. discrete component failures – were discounted. The relevant failures were localised to certain wire bonds on one or other of the two encapsulated chips on the board. This allowed a ‘map’ of the bond failures to be produced.

Comparing this data with the bonding pictures taken by SEM showed that:

  • More forward bonds failed than reverse bonds
  • More bonds near the corners of the chips failed.

The longevity of the reverse bonds was a surprise, while the high failure rate near the corners of the chip simply pointed to the expected issue of thermal expansion mismatch between encapsulant and board.

Remedial actions
Reverse bonding had originally been used to allow the bonder to work around other high profile components on the board. Two immediate remedial actions were taken by the client; to revising the bonding parameters to minimise the heel cracking, and changing the bonding programme to maximise reverse bonding - especially near the corners. These actions reduced the failure rate, but not to an acceptable level.

The client next evaluated a number of different epoxy encapsulants using fast thermal cycling. All but one of these failed. The one remaining epoxy gave rise to no failures and production has since continued using this material without problem.

Why did the reverse bonded wires fare better than the forward bonded wires? It is thought that the epoxy material bonds firmly to the pcb which, on a microscopic scale, is highly keyed. By contrast, the chip surface is smooth and glassy, and the epoxy will not bond well. It therefore seems likely that the partially fractured first bonds on top of the chip fretted through micro movement and broke, while on the pcb they were held more firmly in place.

Further information
When problems occur which are not fully understood it can save a fortune in lost production, warranty repairs, and customer satisfaction to call in an expert. The ‘Price Of Non-Conformance’ is always much, much larger than is at first evident. To find out call us on +44 (0)1372 367444 or email.

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